1. Field of the Invention
This invention relates generally to semiconductor processing, and more particularly to semiconductor chip crack stops and to methods of making the same.
2. Description of the Related Art
Conventional semiconductor chips are routinely fabricated en masse in large groups as part of a single semiconductor wafer. At the conclusion of the processing steps to form the individual dice, a so-called dicing or sawing operation is performed on the wafer to cut out the individual dice. Thereafter, the dice may be packaged or directly mounted to a printed circuit board of one form or another. Conventional semiconductor dice are routinely cut out from the wafer as rectangular shapes. By definition, a conventional semiconductor die has four sides and four corners. The dicing operation is a mechanical cutting operation performed with a type of circular saw. Dicing saws are made with great care and operate more precisely than a comparable masonry circular saw. Despite these refinements, the dicing saw still imposes significant stresses on the individual dice as they are cut. These stresses and impact loads during the cutting operation can cause microscopic fractures in the dice, particularly at the die corners. Once the cut dice are mounted to a package substrate or printed circuit board of one sort or another, the cracks introduced during cutting may propagate further into the center of the dice due to thermal stresses and other mechanical stresses that may be placed on the die. In addition, new cracks may form, particularly near the corners which create so-called stress risers by virtue of their geometries.
A conventional technique for addressing the propagation of cracks from the corners of a die involves the use of a crack stop. A conventional crack stop consists of a frame-like structure formed in and near the edges of the semiconductor die. When viewed from above, the crack stop looks like a picture frame. The conventional crack stop does not extend out to the edges of the conventional die. Because of this geometry, a crack propagating from the corner of a die can achieve a significant length before encountering the die crack stop. If the crack achieves a certain critical length before encountering the conventional crack stop, the crack can become virtually uncontrollable. The crack can overwhelm the conventional crack stop and invade the active portion of the semiconductor die and lay waste to the delicate circuit structures positioned therein.
Another issue that can arise for conventional flip-chip mounted semiconductor chips is high solder joint stresses caused by differing thermal strain rates in the chip versus the substrate to which it is attached. In a typical chip mounted to a substrate by a controlled collapse processing, an array of solder joints electrically connects the chip to the underlying substrate. A neutral point, usually though not necessarily located at the center of the chip, represents an area of substantially zero thermal strain. Solder joints in or near this area suffer low strains. However, proceeding outward from the neutral point, the die and underlying substrate begin to exhibit thermal strains that depend on temperature, coefficient of thermal expansion (CTE) and distance from the neutral point. A substrate usually has CTE that is six to seven times larger than the CTE of the chip. The strains are proportional to the distance from the neutral point. Thus, the solder joints near the die edges are subjected to the highest strains. Conventional crack stops provide little in the way of resistance to solder joint strain.
The present invention is directed to overcoming or reducing the effects of one or more of the foregoing disadvantages.